1. Field of the Invention
The present invention relates in general to a clock fault monitoring circuit using a flip-flop and a counter, and more particularly to a circuit for monitoring, using the flip-flop and the counter, whether a clock in a digital circuit pack or a transmission clock for data communication is operating normally.
2. Description of the Prior Art
Recently, the reliability of a digital transmission device and data transmission thereof has been increased according to an increase in the reliability of a clock used in an electronic device circuit pack or a digital communication system.
Conventionally, a clock fault monitoring circuit is provided with a 74LS123 TTL device to monitor a fault of the clock used in the electronic device circuit pack or the digital communication system. However, the conventional clock fault monitoring circuit has a disadvantage in that timing is not accurate since the clock fault monitoring is performed on the basis of a time constant resulting from the combination of a resistance and a capacitance. Also, the resistance and the capacitance are not standardized but obtained by repeated experimentation. Further, the device density of the circuit pack is high at present. For this reason, the resistance and the capacitance are subject to severe variations due to an increase in the heat generated in the circuit pack. This makes it impossible to monitor the clock fault accurately.